Reddit reviews Computer Architecture: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and Design)

>ISAs are commonly categorized by their complexity, i.e., the size of their instruction space: large ISAs such as x86-64 are called Complex Instruction Set Architectures (CISC), while the chips powering smartphones and other portable, low-power devices are based on a Reduced Instruction Set Architecture (RISC). The huge instructions space of the typical CISC ISA necessitates equally complex and powerful chips while RISC designs tend to be simpler and therefore less power hungry.

I do understand that this a "once over lightly", but, based on spending a few years of my career working with a team to select a "net gen" embedded processor for a Fortune 50 company (that would purchase millions) I do feel qualified to make these comments. (I am also the proud owner of a well worn 1st Edition of the Hennessy and Patterson Computer Architecture: A Quantitative Approach)

The lines between RISC and CISC keep getting muddier every year that goes by. While probably no longer true, but the biggest differentiator between RISC and CISC was that RISC used fixed length instructions. This made decoding the instructions MUCH simpler. The decode portion of a CISC CPU had to grab a few bytes, partially decode them, and then decide how many more bytes to grab.

The old Digital Equipment Corporation VAX architecture was (and probably still is) the MOST complex instruction set architecture. Most arithmetic and logical operation could have 3 operands and each operand could have any combination of multiple addressing modes. Worse, the VAX architecture dedicated 3 of the only 16 register for "context" (SP, FP and AP).

RISC machines had more registers than CISC machines and, over time, compiler writers figured out how to do the equivalent of the FP and AP from deltas off the SP. With the larger number of registers, typically one register was a dedicated constant zero register, necessary because all memory was accessed via indirect addressing. For embedded processor that had no loader to do "fix up" at load time, 1 or 2 more registers became dedicated pointers to specific types of memory (perhaps RAM vs ROM or "short" data vs "complex" data i.e. arrays, strings, etc)

With smaller die sizes, RISC machines could have more cache on chip. More cache meant "more faster" !

Computer Organization and Design RISC-V Edition: The Hardware Software Interface (ISSN) https://www.amazon.com/dp/B0714LM21Z/ref=cm_sw_r_cp_api_i_Wn3xDbMYHH61S

Computer Architecture: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and Design) https://www.amazon.com/dp/0128119055/ref=cm_sw_r_cp_api_i_jp3xDbRYQ12GA

In addition to these, check out Computer Architecture: A Quantatative Approach by Hennesey & Patterson. I had this as a textbook as an undergrad and still throw it at folks when they are doing very low-level optimizations that require intimate understanding of modern computers.

No a textbook

https://www.amazon.co.uk/Computer-Architecture-Quantitative-Approach-Kaufmann/dp/0128119055

The formal name for this field is "computer architecture." The most popular textbook by far is Patterson and Hennessey, and it's pretty easy to find materials from college courses posted online, ex. MIT open courseware, UC Berkeley.

For something less likely to put you to sleep, Ben Eater has a great Youtube channel where he explains computer architecture from a practical angle. He's got a great series where he builds a simple 8-bit computer from scratch, explaining all the pieces along the way.

https://www.amazon.com/Computer-Organization-Design-MIPS-Architecture/dp/0124077269

After that:

https://www.amazon.com/Computer-Architecture-Quantitative-Approach-Kaufmann/dp/0128119055

These authors are the foremost authorities in the field. The second book is *the* textbook for computer architecture. These are the people that invented RISC.

Welcome!

You need two books:

https://www.amazon.com/Computer-Organization-Design-RISC-V-Architecture/dp/0128122757

Get the original MIPS or later ARM version if you prefer -- they're absolutely fine, and the principles you learn one one apply to everything -- but the RISC-V one is the newest and is the only only one that you're actually legally allowed to make an implementation of at home and distribute, put on github etc.

But of course designing and making your own 16 bit ISA is huge fun, so I definitely recommend that too!

Once you've digested all that, their other book is more advanced. But the first one will get you a long way. This next one is the absolute bible of real computer architects and hardware designers.

https://www.amazon.com/Computer-Architecture-Quantitative-Approach-Kaufmann/dp/0128119055

That's by these guys, who originally invented the RISC-I and MIPS processors in the early 80s, invented the term "RISC" (and also RAID, btw). They recently received the Turing award for their lifetime efforts:

https://www.youtube.com/watch?v=3LVeEjsn8Ts

Join comp.arch on usenet / google groups. There are lots of actual working or retired computer architects there, and they're helpful to energetic students and amateurs designing their own toy stuff.