Reddit reviews Hdl Chip Design: A Practical Guide for Designing, Synthesizing & Simulating Asics & Fpgas Using Vhdl or Verilog

Pong P. Chu's "Verilog/VHDL by Example" :

http://www.amazon.com/FPGA-Prototyping-Verilog-Examples-Spartan-3/dp/0470185325/ref=sr_1_2?ie=UTF8&qid=1412004641&sr=8-2&keywords=verilog+by+example

Really good, easy read:

http://www.amazon.com/Bebop-Boolean-Boogie-Third-Unconventional/dp/1856175073/ref=sr_1_3?ie=UTF8&qid=1412004683&sr=8-3&keywords=maxfield+clive

This is an older book, but is pretty cool because it has verilog on one page and VHDL on the other, in addition to showing you how some tools might synthesize it. Meaning you get a schematic of how it was implemented. Very good to learn what hardware gets instantiated by your HDL :

http://www.amazon.com/Hdl-Chip-Design-Synthesizing-Simulating/dp/0965193438/ref=cm_cr_pr_product_top

Actually, I worded it so there isn't an assumption on the languages being discussed, just using Language A and Language B as examples to show the flaw in the methodology used. It may or may not be reality, I don't know, but the article drawing the conclusions don't show that the data they used for the conclusion is valid either. It could be just the opposite, and verilog requires more googling, in that case, the data would be just as flawed.

You are right, they may require similar amounts of googling, Verilog may require much, much more, or it may be VHDL that requires more. However, to make a conclusion from the data (the one in the article is that the google search results represented the number of users, and could be counted on to make a fairly significant decision), you need to show that the data represents what is claimed.

With respect to the decision on what language to learn first, either will work, I learned VHDL before Verilog. The person should use real data based on their needs to make the decision. Look at the industries, schools, etc that you are aiming to work with/in. If you are learning FPGA's as a hobby, what sources are you using to learn, are they VHDL or Verilog oriented. I would also recommend a good book that gives examples in both languages like this, it is an older book, so I would look for a newer one, but it gives examples in both languages side by side. This gives a person exposure to the language they are not using while learning one, making it much easier to learn the second later. Like most programing problems, the language really doesn't matter if you get good fundementals, switching languages becomes a minor issue.

TL;DR: Learn the language that makes sense for your situation first, but don't trust the data from the article to make this decision.