Reddit Reddit reviews HiLetgo 2pcs HD44780 IIC I2C1602 LCD Display with IIC I2C TWI SPI Serial Interface Adapter 1602 LCD Display Blue Backlight for Arduino

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HiLetgo 2pcs HD44780 IIC I2C1602 LCD Display with IIC I2C TWI SPI Serial Interface Adapter 1602 LCD Display Blue Backlight for Arduino
Displays 2-lines X 16-charactersBlue Backlight LCD ModuleOperate Voltage: 5V
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1 Reddit comment about HiLetgo 2pcs HD44780 IIC I2C1602 LCD Display with IIC I2C TWI SPI Serial Interface Adapter 1602 LCD Display Blue Backlight for Arduino:

u/the_medicine ยท 1 pointr/FPGA

My mistake, you are right. It is that LCD, but it has a little I2C backpack attached. I don't know if you looked at the repo but its named SPI master test because the thing was marketed as accepting SPI or I2C, but its definitely only the latter. Here is the product. I couldn't produce the datasheet for the module, but only the actual expander chip.

With this project I'm trying to do a few things: first and foremost I want to figure out how to configure an LCD to display data using an I2C master. The i2c master would obviously be instantiated in the fpga hardware, but the control would be with software in the embedded NIOS 2 processor.

Secondarily, I'm playing with using git to manage these projects so that when i get my group involved ill have some guidance for them. Finally I'm trying to educate myself about serial protocols and I figured going through the pain of configuring an I2c master would go a long way to that. But these are more or less besides the point.

So I got caught up with the embedded guides recommendation to use the PIO cores to configure the bidirectional buffer, but I couldn't figure out how to do this. I've opted to do what you recommended (4 lines of code) and the sample code shown in the guide. I originally thought I needed the PIOs to expose the I2c data to the NIOS 2, but it looks like the control and status register of the I2c master makes that data available just fine. So no harm done.

The endgame here is to have an AES encryption algorithm instantiated in the hardware, but to have every level of it exposed to the NIOS 2 such that testing will be a bit easier (and I mean testing for our purposes, i know this will actually complicate testing the system itself) . My group is doing a power analysis attack on AES running on a FPGA. To do this we measure current traces that are associated with a plaintext and its intermediates throughout encryption. A problem we encountered was the current variation on the large, peripheral-laden eval board was so large that it was impossible (with our equipment) to measure the current at the resolution we need, and because of that variation, would probably have been meaningless anyway. We have another solution for this, but in the meantime, I'm trying to eliminate peripherals in an effort to limit that totally wacky current. Finally, I wan't to put everything into a repo so that the next lucky group actually has something besides a crappy dropbox like we inherited when we started this project.

Lol I know you didn't ask for all this, but I think sometimes I come off as a guy posting up here without trying, and I really don't like to ask for help here unless I've hit a dead-end. What I need help with now is configuring the I2C master core. If you look at the I2C state machine diagram in the embedded guide, the first thing you must do is configure some registers. I'm not sure what the meaning of those registers is, for instance how do you choose a vale for SCL_LOW, SCL_HIGH, or SDA_HOLD? Additionally, the LCDs max frequency is 270khz, but the expander chip's max frequency is (in keeping with what I know about I2C) 100Khz.