Reddit reviews The Designer's Guide to VHDL, Third Edition (Systems on Silicon) (Volume 3)

There are two books that are decent

SystemVerilog for Verification and SystemVerilog for Design


I have found The Designer's Guide to VHDL by Peter Ashenden to be a god-send for learning VHDL from a language perspective. I have found nothing as good for SystemVerilog. Those two books I mentioned are close though.

My personal opinion is that SystemVerilog is cool, but frankly just an unmitigated shit-show of language design. They should be ashamed of how poor it is.

There is no concept of a standard library, and things that should be in a standard library are core language. Then there is this idea of a "Verification Methodology" like OVM and UVM, which are libraries, but they are glued into the core language through MACROS!!! MACROS!! I'm not kidding. It is almost comical how bad it is.
As I've said before. We need an open source simulator that can handle multiple language simulations, and then to replace this mess with something modern and awesome.


I would also suggest checking out this guys stuff http://syswip.com/. It is a little funny in some places, but it really helped me understand so of the approaches that a designer could take. The approach a UVM guy would take, is sadly, almost completely different than this. I don't think it is better though depending on what you are doing.

A tutorial written by Ashenden himself

However, I consider his full book as the bible: https://www.amazon.com/Designers-Guide-Third-Systems-Silicon/dp/0120887851/ref=sr_1_1?ie=UTF8&qid=1492258842&sr=8-1&keywords=ashenden+vhdl

Edit: Check out the all time top posts for this subreddit. Multiple posts with free books.

https://www.amazon.com/gp/aw/d/0120887851/

Good luck to you.

This is the best VHDL reference by far.

Ashenden

A decent reference for system verilog, I guess verilog as well.

sysverilog for design

This github account has a good bit of decent FPGA focused Hdl

https://github.com/analogdevicesinc/hdl

And this one

https://github.com/EttusResearch/fpga

If I was you I would focus on being fluent in one vendor, probably Xilinx. I would also focus on learning how to implement Axi4 Streaming Interfaces with back pressure. It’s relatively new on that side of things and may be a decent way to differentiate yourself early on. It’s subtlety complex and very powerful when used consistently.

Anyone I’d think about hiring as a 3 to do FPGA needs to know modelsim or the equivalent. Vendors will try to convince you their generator stuff is so good “you don’t have to simulate it!” They are lying.

Get the vendor one from microsemi or Altera, or use xsim. Xsim I find dumb, but I’ve got lots of stick time on more expensive tools.

I think CS and CompE professors often give a lot of very biased and bad advice -- it's too bad. Just like being a linux enthusiast, you don't really need to have a degree or be paid to do it for fun. There are a few very good books on VHDL and Verilog. One is the Designer's guide to VHDL which describes basic logic circuits in VHDL.

It's also just like becoming a good programmer or linux admin in the way that you can't be afraid to read manuals. If you can do that, you can get through it. Google and the Xilinx forums are probably better than they were when you were last in school.

Here is the mobile version of your link